Can The Eip Register Be The Source

Assembly - Registers

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Processor operations mostly involve processing data. This data tin be stored in memory and accessed from thereon. However, reading data from and storing data into retentivity slows down the processor, as information technology involves complicated processes of sending the data request beyond the command bus and into the memory storage unit and getting the information through the same channel.

To speed up the processor operations, the processor includes some internal memory storage locations, called registers.

The registers store data elements for processing without having to admission the memory. A limited number of registers are built into the processor fleck.

Processor Registers

At that place are ten 32-bit and half-dozen 16-bit processor registers in IA-32 architecture. The registers are grouped into three categories −

• General registers,
• Control registers, and
• Segment registers.

The general registers are farther divided into the following groups −

• Data registers,
• Pointer registers, and
• Index registers.

Data Registers

Four 32-bit information registers are used for arithmetic, logical, and other operations. These 32-flake registers can be used in three ways −

• As complete 32-fleck data registers: EAX, EBX, ECX, EDX.

• Lower halves of the 32-chip registers can be used as iv sixteen-bit information registers: AX, BX, CX and DX.

• Lower and higher halves of the above-mentioned four xvi-bit registers can be used as viii eight-scrap data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Some of these data registers have specific use in arithmetical operations.

AX is the main accumulator; it is used in input/output and most arithmetic instructions. For example, in multiplication functioning, ane operand is stored in EAX or AX or AL register according to the size of the operand.

BX is known as the base register, as it could be used in indexed addressing.

CX is known as the count register, as the ECX, CX registers store the loop count in iterative operations.

DX is known equally the data register. Information technology is likewise used in input/output operations. Information technology is as well used with AX register along with DX for multiply and split up operations involving large values.

Pointer Registers

The pointer registers are 32-scrap EIP, ESP, and EBP registers and corresponding xvi-chip right portions IP, SP, and BP. There are three categories of arrow registers −

• Didactics Arrow (IP) − The sixteen-scrap IP register stores the first address of the next instruction to exist executed. IP in association with the CS register (as CS:IP) gives the consummate address of the current instruction in the code segment.

• Stack Pointer (SP) − The xvi-flake SP register provides the offset value inside the program stack. SP in clan with the SS register (SS:SP) refers to be current position of data or address inside the program stack.

• Base Arrow (BP) − The 16-scrap BP annals mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to get the location of the parameter. BP tin too be combined with DI and SI equally base register for special addressing.

Index Registers

The 32-chip alphabetize registers, ESI and EDI, and their xvi-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in add-on and subtraction. There are two sets of alphabetize pointers −

• Source Index (SI) − It is used as source alphabetize for string operations.

• Destination Alphabetize (DI) − It is used every bit destination index for cord operations.

Command Registers

The 32-chip instruction pointer register and the 32-fleck flags register combined are considered as the control registers.

Many instructions involve comparisons and mathematical calculations and change the condition of the flags and some other conditional instructions test the value of these status flags to take the control flow to other location.

The common flag $.25 are:

• Overflow Flag (OF) − It indicates the overflow of a high-order bit (leftmost chip) of data afterward a signed arithmetics operation.

• Management Flag (DF) − It determines left or correct direction for moving or comparing string data. When the DF value is 0, the string performance takes left-to-correct direction and when the value is gear up to 1, the string operation takes correct-to-left direction.

• Interrupt Flag (IF) − Information technology determines whether the external interrupts similar keyboard entry, etc., are to be ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when prepare to 1.

• Trap Flag (TF) − It allows setting the performance of the processor in single-pace way. The DEBUG program we used sets the trap flag, so nosotros could step through the execution ane education at a time.

• Sign Flag (SF) − It shows the sign of the result of an arithmetic performance. This flag is set according to the sign of a data detail following the arithmetic performance. The sign is indicated by the high-guild of leftmost fleck. A positive result clears the value of SF to 0 and negative result sets it to ane.

• Zippo Flag (ZF) − It indicates the outcome of an arithmetic or comparison operation. A nonzero result clears the nada flag to 0, and a nothing result sets information technology to ane.

• Auxiliary Carry Flag (AF) − It contains the carry from fleck 3 to flake four following an arithmetics operation; used for specialized arithmetic. The AF is set when a 1-byte arithmetic operation causes a acquit from bit 3 into bit 4.

• Parity Flag (PF) − It indicates the total number of i-$.25 in the outcome obtained from an arithmetic operation. An even number of 1-bits clears the parity flag to 0 and an odd number of 1-bits sets the parity flag to 1.

• Conduct Flag (CF) − It contains the bear of 0 or 1 from a loftier-order flake (leftmost) subsequently an arithmetic operation. It likewise stores the contents of last bit of a shift or rotate operation.

The following table indicates the position of flag $.25 in the 16-bit Flags register:

Flag:					O	D	I	T	S	Z		A		P		C
Bit no:	15	14	thirteen	12	11	10	9	eight	seven	6	5	iv	3	two	i	0

Segment Registers

Segments are specific areas defined in a program for containing data, code and stack. There are three master segments −

• Code Segment − It contains all the instructions to exist executed. A 16-scrap Lawmaking Segment register or CS register stores the starting address of the code segment.

• Data Segment − Information technology contains information, constants and work areas. A 16-bit Data Segment register or DS annals stores the starting address of the information segment.

• Stack Segment − Information technology contains data and render addresses of procedures or subroutines. It is implemented every bit a 'stack' data structure. The Stack Segment register or SS register stores the starting address of the stack.

Apart from the DS, CS and SS registers, there are other actress segment registers - ES (extra segment), FS and GS, which provide additional segments for storing information.

In associates programming, a plan needs to admission the memory locations. All memory locations within a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by sixteen or hexadecimal 10. So, the rightmost hex digit in all such retention addresses is 0, which is not generally stored in the segment registers.

The segment registers stores the starting addresses of a segment. To go the verbal location of information or instruction inside a segment, an offset value (or displacement) is required. To reference any memory location in a segment, the processor combines the segment address in the segment register with the beginning value of the location.

Example

Look at the following uncomplicated program to understand the apply of registers in associates programming. This program displays ix stars on the screen along with a simple bulletin −

section	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;message length    mov	ecx,msg  ;bulletin to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,4    ;system call number (sys_write)    int	0x80     ;call kernel 	    mov	edx,9    ;bulletin length    mov	ecx,s2   ;bulletin to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,4    ;system telephone call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,1    ;system telephone call number (sys_exit)    int	0x80     ;call kernel 	 section	.data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg  ;length of message s2 times ix db '*'        

When the above lawmaking is compiled and executed, it produces the post-obit result −

Displaying nine stars *********        

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Source: https://www.tutorialspoint.com/assembly_programming/assembly_registers.htm

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